Low dropout regulator and phase-locked loop

ABSTRACT

Embodiments of the present invention disclose a low dropout regulator and a phase-locked loop. The low dropout regulator includes: a reference voltage source, an error amplifier coupled to the reference voltage source, a regulating circuit, a load coupled to the regulating circuit, a first compensation circuit, and a second compensation circuit. The regulating circuit produces a regulating current under control of a control voltage from the error amplifier. The first compensation circuit is coupled between the error amplifier and the regulating circuit. The second compensation circuit is coupled between an input terminal and an output terminal of the regulating circuit.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.15/857,037, filed on Dec. 28, 2017, which is a continuation ofInternational Application No. PCT/CN2016/087707, filed on Jun. 29, 2016,which claims priority to Chinese Patent Application No. 201510374098.1,filed on Jun. 30, 2015. All of the afore-mentioned patent applicationsare hereby incorporated by reference in their entireties.

TECHNICAL FIELD

The present application relates to the semiconductor field, and inparticular, to a low dropout regulator and a phase-locked loop.

BACKGROUND

A phase-locked loop (PLL) refers to an automatic control closed-loopsystem including a phase detector, a loop filter, a voltage controloscillator (VCO), and the like. The PLL can complete phasesynchronization between two electrical signals, and therefore is widelyapplied to fields such as broadcast communication, frequency synthesis,automatic control, and clock synchronization. Stability of the PLL isaffected by noise and fluctuation of a power source. Therefore, inactual application, a low dropout regulator (LDO) usually needs to beused to overcome impact of the noise and fluctuation of the power sourceon the PLL, to ensure a feature of a noise-sensitive circuit such as thePLL.

As shown in FIG. 1, a prior-art LDO may include a reference voltagesource 101, an error amplifier 102, a compensation circuit 103, atransistor 104, a bleeder circuit 105, and a load 106. The compensationcircuit includes a nulling resistor 1031 and a Miller compensationcapacitor 1032, and the bleeder circuit includes a first bleederresistor 1051 and a second bleeder resistor 1052. Due to existence ofthe compensation circuit, noise distribution of the prior-art LDO isshown in FIG. 1, where V_(n,op) ² equivalent input noise of the erroramplifier 102, V_(n,bg) ² represents output noise of the referencevoltage source 101, V_(n,R1) ² represents thermal noise of the resistor1051, and V_(n,R2) ² represents thermal noise of the resistor 1052. Itcan be learned from the noise distribution of the prior-art LDO that, inthe prior-art LDO, noise performance of the LDO can be improved bysignificantly increasing a transconductance of the error amplifier.

However, a minimum value exists in layout implementation of the nullingresistor, and the minimum value is usually of a magnitude of 10 ohms;and a maximum value of a capacitance also exists in layoutimplementation of the Miller compensation capacitor. Therefore, again-bandwidth product of the error amplifier has a maximum value lowerlimit. A transconductance upper limit of the error amplifier isrelatively low because the gain-bandwidth product of the error amplifierhas a maximum value lower limit. Once the transconductance of the erroramplifier exceeds the upper limit, system stability of the LDO iscompromised.

Therefore, it can be learned that, because the transconductance upperlimit of the error amplifier is relatively low, noise performance of theprior-art LDO is relatively poor.

SUMMARY

Embodiments of the present invention provide a low dropout regulator, amethod for improving stability of the low dropout regulator, and aphase-locked loop, so as to overcome a problem of poor noise performanceof a prior-art low dropout regulator.

According to a first aspect, an embodiment of the present inventionprovides a low dropout regulator, including: a reference voltage source,configured to provide a reference voltage; an error amplifier, coupledto the reference voltage source, and configured to receive a feedbackvoltage and the reference voltage, compare the feedback voltage with thereference voltage, and output a control voltage according to a result ofcomparing the feedback voltage with the reference voltage; a regulatingcircuit, coupled to the error amplifier, and configured to receive thecontrol voltage, and output a regulating current under control of thecontrol voltage; a load, coupled to the regulating circuit and the erroramplifier, where an on-load voltage is formed when the regulatingcurrent passes through the load, and the feedback voltage is related tothe on-load voltage; a first compensation circuit, coupled to theregulating circuit, and configured to regulate a dominant pole and asecondary dominant pole of the low dropout regulator, so as to regulatea phase margin; and a second compensation circuit, coupled to the firstcompensation circuit, and configured to: decrease the dominant pole ofthe low dropout regulator and further increase the secondary dominantpole on the basis that the first compensation circuit has regulated thedominant pole and the secondary dominant pole of the low dropoutregulator, so as to regulate the phase margin; and regulate again-bandwidth product of the low dropout regulator.

With reference to the first aspect, in a first possible implementationmanner of the first aspect, the regulating circuit includes atransistor.

With reference to the first possible implementation manner of the firstaspect, in a second possible implementation manner of the first aspect,the first compensation circuit includes a nulling resistor and a Millercompensation capacitor, where a terminal of the Miller compensationcapacitor is connected to a drain of the transistor, another terminal ofthe Miller compensation capacitor is connected to a terminal of thenulling resistor, and another terminal of the nulling resistor isconnected to the second compensation circuit.

With reference to the second possible implementation manner of the firstaspect, in a third possible implementation manner of the first aspect,the second compensation circuit includes a compensation resistor, wherea terminal of the compensation resistor is connected to an outputterminal of the error amplifier, and another terminal of thecompensation resistor is connected to a terminal of the nulling resistorand a gate of the transistor.

With reference to the third possible implementation manner of the firstaspect, in a fourth possible implementation manner of the first aspect,a resistance value of the compensation resistor is not less than aresistance value of an equivalent load resistor of the error amplifierand is less than or equal to R_(B-MAX), where R_(B-MAX) is a resistancevalue of the compensation resistor when noise reduced by thecompensation resistor is equal to noise introduced by the compensationresistor, and the noise reduced by the compensation resistor is noisethat is introduced by another component in the low dropout regulator andthat is eliminated by the compensation resistor.

With reference to any one of the first aspect or the first to fourthpossible implementation manners of the first aspect, in a fifth possibleimplementation manner of the first aspect, the low dropout regulatorfurther includes a feedback circuit, where the feedback circuit isconnected to the error amplifier and the load, and is configured toreceive the on-load voltage and generate the feedback voltage accordingto the on-load voltage.

With reference to any one of the first aspect or the first to fifthpossible implementation manners of the first aspect, in a sixth possibleimplementation manner of the first aspect, the low dropout regulatorfurther includes a noise filter circuit, where the noise filter circuitis coupled to the reference voltage source and the error amplifier, andis configured to perform noise filtering on the reference voltageprovided by the reference voltage source, and send, to the erroramplifier, the reference voltage on which noise filtering is performed.

According to a second aspect, an embodiment of the present inventionfurther provides a phase-locked loop, where the phase-locked loopincludes the low dropout regulator according to any one of the firstaspect or the possible implementation manners of the first aspect.

According to a third aspect, an embodiment of the present inventionfurther provides a method for improving stability of a low dropoutregulator, including: receiving a reference voltage and a feedbackvoltage; comparing the feedback voltage with the reference voltage, andgenerating a control voltage according to a result of comparing thefeedback voltage with the reference voltage; generating a regulatingcurrent under control of the control voltage; regulating a dominant poleand a secondary dominant pole of the low dropout regulator according tothe regulating current; and further regulating the dominant pole and thesecondary dominant pole of the low dropout regulator according to theregulating current on the basis that the dominant pole and the secondarydominant pole of the low dropout regulator are regulated according tothe regulating current, and regulating a gain-bandwidth product of thelow dropout regulator according to the regulating current.

With reference to the third aspect, in a first possible implementationmanner of the third aspect, after the receiving a reference voltage anda feedback voltage, the method further includes: performing noisefiltering on the reference voltage; and the comparing the feedbackvoltage with the reference voltage includes: comparing the feedbackvoltage with the reference voltage on which noise filtering isperformed.

The low dropout regulator in the embodiments of the present inventionincludes: a reference voltage source, configured to provide a referencevoltage; an error amplifier, coupled to the reference voltage source,and configured to receive a feedback voltage and the reference voltage,compare the feedback voltage with the reference voltage, and output acontrol voltage according to a result of comparing the feedback voltagewith the reference voltage; a regulating circuit, coupled to the erroramplifier, and configured to receive the control voltage, and output aregulating current under control of the control voltage; a load, coupledto the regulating circuit and the error amplifier, where an on-loadvoltage is formed when the regulating current passes through the load,and the feedback voltage is related to the on-load voltage; a firstcompensation circuit, coupled to the regulating circuit, and configuredto regulate a dominant pole and a secondary dominant pole of the lowdropout regulator, so as to regulate a phase margin; and a secondcompensation circuit, coupled to the first compensation circuit, andconfigured to: decrease the dominant pole of the low dropout regulatorand further increase the secondary dominant pole on the basis that thefirst compensation circuit has regulated the dominant pole and thesecondary dominant pole of the low dropout regulator, so as to regulatethe phase margin; and regulate a gain-bandwidth product of the lowdropout regulator. Because the second compensation circuit is added, byusing the low dropout regulator provided in the embodiments of thepresent invention, a value of the gain-bandwidth product and a size ofthe dominant pole can be significantly reduced, and a size of thesecondary dominant pole can be increased. Therefore, by introducing thesecond compensation circuit, system stability of the low dropoutregulator can be greatly improved, and a transconductance of the erroramplifier in the present invention can be greater than atransconductance of a prior-art error amplifier. Therefore, the erroramplifier in the present invention has better noise performance.

BRIEF DESCRIPTION OF DRAWINGS

To describe the technical solutions in the embodiments of the presentinvention or in the prior art more clearly, the following brieflydescribes the accompanying drawings required for describing theembodiments or the prior art. Apparently, a person of ordinary skill inthe art may still derive other drawings from these accompanying drawingswithout creative efforts.

FIG. 1 is a schematic structural diagram of a prior-art LDO;

FIG. 2 is a schematic structural diagram of an embodiment of an LDOaccording to the present invention;

FIG. 3 is a schematic structural diagram of another embodiment of an LDOaccording to the present invention;

FIG. 4 is a schematic structural diagram of an embodiment of an erroramplifier in an LDO according to the present invention;

FIG. 5 is a schematic structural diagram of another embodiment of an LDOaccording to the present invention; and

FIG. 6 is a schematic flowchart of an embodiment of a method forimproving stability of a low dropout regulator according to the presentinvention.

DESCRIPTION OF EMBODIMENTS

The following clearly describes the technical solutions in theembodiments of the present invention with reference to the accompanyingdrawings in the embodiments of the present invention. Apparently, thedescribed embodiments are merely a part rather than all of theembodiments of the present invention. All other embodiments obtained bya person of ordinary skill in the art based on the embodiments of thepresent invention without creative efforts shall fall within theprotection scope of the present invention.

Referring to FIG. 2, FIG. 2 is a schematic structural diagram of anembodiment of an LDO according to the present invention.

As shown in FIG. 2, the LDO according to the present invention mayinclude: a reference voltage source 201, an error amplifier 202, aregulating circuit 203, a first compensation circuit 204, a secondcompensation circuit 205, and a load 206.

The reference voltage source 201 is configured to provide a referencevoltage. The error amplifier 202 is coupled to the reference voltagesource 201, and is configured to receive a feedback voltage and thereference voltage, compare the feedback voltage with the referencevoltage, and output a control voltage according to a result of comparingthe feedback voltage with the reference voltage. The regulating circuit203 is coupled to the error amplifier 202, and is configured to receivethe control voltage, and output a regulating current under control ofthe control voltage. The load 206 is coupled to the regulating circuit203 and the error amplifier 202, where an on-load voltage is formed whenthe regulating current passes through the load 206. The firstcompensation circuit 204 is coupled to the regulating circuit 203, andis configured to regulate a dominant pole and a secondary dominant poleof the low dropout regulator, so as to regulate a phase margin. Thesecond compensation circuit 205 is coupled to the first compensationcircuit 204, and is configured to: further regulate the dominant poleand the secondary dominant pole on the basis that the first compensationcircuit 204 has regulated the dominant pole and the secondary dominantpole of the low dropout regulator, so as to regulate the phase margin;and regulate a gain-bandwidth product of the low dropout regulator. Thefeedback voltage is related to the on-load voltage. This generally meansthat the feedback voltage and the on-load voltage are in a linearrelationship. For example, the feedback voltage is the on-load voltage,or the feedback voltage is in a predetermined proportional relationshipwith the on-load voltage.

It should be noted herein that, decreasing a dominant pole means that adominant pole, of the low dropout regulator, obtained through regulationby the first compensation circuit 204 is less than the dominant polethat has not been regulated by the first compensation circuit 204;increasing a secondary dominant pole means that a secondary dominantpole obtained through regulation by the first compensation circuit 204is greater than the secondary dominant pole that has not been regulatedby the first compensation circuit 204; and decreasing a gain-bandwidthproduct means that a gain-bandwidth product obtained through regulationby the first compensation circuit 204 is less than the gain-bandwidthproduct that has not been regulated by the first compensation circuit204.

In specific implementation, a circuit structure of the LDO may be shownin FIG. 3.

A negative input of the error amplifier 202 is connected to thereference voltage source 201 and is configured to receive the referencevoltage from the reference voltage source. A positive input of the erroramplifier 202 is coupled to the load, and is configured to receive thefeedback voltage.

The first compensation circuit 204 may be a Miller capacitor-nullingresistor compensation circuit. That is, the first compensation circuit204 may include a nulling resistor 2041 and a Miller compensationcapacitor 2042. The Miller compensation capacitor 2042 is connected to adrain of the transistor 203, and is further connected to a terminal ofthe nulling resistor 2041. Another terminal of the nulling resistor 2041is connected to the second compensation circuit 205.

The regulating circuit 203 may be a power MOS device such as atransistor. The second compensation circuit 205 may include acompensation resistor 2051. A terminal of the compensation resistor 2051is connected to an output terminal of the error amplifier 202, andanother terminal of the compensation resistor 2051 is connected to aterminal of the nulling resistor 2041 and a gate of the regulatingcircuit 203. The compensation resistor 2051 may be a silicon diffusionresistor, a MOS device resistor, or a metal wiring resistor.

It can be obtained, according to load distribution of the LDO in thepresent invention by formulating and solving node current and voltageequations, that three poles of the LDO are:

${p_{1} \cong \frac{- 1}{g_{m\; 2}R_{LOAD}{C_{c}\left( {R_{1} + R_{B}} \right)}}};$${p_{2} \cong \frac{{- g_{m\; 2}}{C_{C}\left( {1 + {R_{B}/R_{1}}} \right)}}{{C_{1}C_{2}} + {C_{C}C_{1}} + {C_{C}C_{2}} + {g_{m\; 2}R_{B}C_{C}C_{1}}} \cong \frac{- {g_{m\; 2}\left( {1 + {R_{B}/R_{1}}} \right)}}{C_{2} + {g_{m\; 2}R_{B}C_{1}}}};{and}$${p_{3} \cong \frac{- \left( {1 + {g_{m\; 2}R_{B}{C_{o\; 1}/C_{o\; 2}}}} \right)}{R_{nl}C_{o\; 1}}};$

a zero point of the LDO is:

${z_{1} = \frac{1}{C_{C}\left( {{1/g_{m\; 2}} - R_{nl}} \right)}};$and a GBW of the LDO may be represented as:

${{GBW} = {\frac{g_{m\; 1}}{C_{C}}\frac{R_{1}}{\left( {R_{1} + R_{B}} \right)}}},$where

C_(C) is a capacitance value of the Miller compensation capacitor 2042,R_(nl) is a resistance value of the nulling resistor 2041, g_(m2) is atransconductance of the regulating circuit 203, g_(m1) is atransconductance of the error amplifier 202, R_(LOAD) is a loadresistance value of the load, C_(LOAD) is a load capacitance value ofthe load 206, R₁ is a resistance value of an equivalent load resistor ofthe error amplifier 202, C₁ is a capacitance value of an equivalent loadcapacitor of the error amplifier 202, and R_(B) is a resistance value ofthe compensation resistor 2051.

It can be learned that, because the pole p2 is canceled by the zeropoint, the dominant pole of the LDO in the present invention is p1, andthe secondary dominant pole is p3. In the LDO provided in thisembodiment of the present invention, by adding the second compensationcircuit, the gain-bandwidth product GBW and the dominant pole p1 can besignificantly reduced, and the secondary dominant pole p3 can beincreased. Therefore, by introducing the second compensation circuit,system stability is greatly improved, and a transconductance of theerror amplifier in the present invention can be greater than atransconductance of a prior-art error amplifier. Therefore, the erroramplifier in the present invention has better noise performance. Inaddition, introduction of the second compensation circuit not only canreduce an area of the LDO by reducing a value of C_(C), but also canincrease a phase margin of the LDO by reducing the GBW of the LDO,thereby improving a load driving capability of the LDO.

Further, because a resistor also introduces noise, when the secondcompensation circuit is a compensation resistor, a formula of noiseintroduced by the compensation resistor may be represented as:

${\overset{\_}{V_{n,{out}}^{2}} = {\int_{f_{1}}^{f_{2}}{\left( {\overset{\_}{V_{n,{ea}}^{2}} + {\left( {\frac{1}{{sRC} + 1}} \right)^{2}\overset{\_}{V_{n,{ref}}^{2}}} + {\overset{\_}{V_{n,{PFET}}^{2}}\frac{1}{A_{V}^{2}}} + {4{kTR}_{B}\frac{1}{A_{V}^{2}}}} \right){df}}}},$where

V_(n,out) refers to output noise of the LDO, V_(n,ea) refers to noiseintroduced by the error amplifier 202, sRC refers to a time constant ofa noise filter, V_(n,ref) refers to noise introduced by the referencevoltage source 201, V_(n,PFET) refers to noise introduced by thetransistor 203, A_(V) refers to a gain of the error amplifier 202, krefers to a Boltzmann constant, and T refers to a temperature.

Although noise introduced by another component of the LDO can be morereduced as the resistance value of the compensation resistor increases,it can be learned from the foregoing formulas that the noise introducedby the compensation resistor also increases as the resistance value ofthe compensation resistor increases, and when the resistance value ofthe compensation resistor exceeds a specific value, the noise introducedby the resistor may exceed noise reduced by the compensation resistor.The noise reduced by the compensation resistor refers to the noise thatis introduced by the another component in the low dropout regulator andthat is eliminated by the compensation resistor.

To prevent the compensation resistor from introducing too large noise,in actual usage, a value of R_(B) needs to be less than R_(B-MAX), andR_(B-MAX) refers to a resistance value of the compensation resistor 2051when the noise reduced by the compensation resistor 2051 is equal to thenoise introduced by the compensation resistor 2051. R_(B-MAX) may becalculated according to the noise introduced by the error amplifier 202,the noise introduced by the reference voltage source 201, the noiseintroduced by the transistor 203, and the gain of the error amplifier202.

It can be learned from the formulas for calculating the poles that whenR_(B)≥R₁, the GBW and P₁ start to change significantly. Therefore,usually, it may be set that R_(B)≥R₁. Therefore, a value range of R_(B)may be R₁>R_(B)>R_(B-MAX). When the value of R_(B) falls within thisrange, noise of the LDO can be effectively reduced.

To further improve noise performance of the LDO, as shown in FIG. 4, theerror amplifier 202 may include a bias current source 2021, an inputtube 2022, and an output current mirror 2023. The input tube 2022 iscoupled between the bias current source 2021 and the output currentmirror 2023.

Equivalent input noise of the error amplifier 202 may be represented as:

${\overset{\_}{V_{op}^{2}} \approx {2\left( {{4{kT}\;{\gamma\left\lbrack {\frac{g_{m,{out}}}{g_{m,{in}}^{2}} + \frac{1}{g_{m,{in}}}} \right\rbrack}} + {{\frac{1}{C_{ox}}\left\lbrack {\frac{K_{out}g_{m,{out}}^{2}}{({WL})_{out}g_{m,{in}}^{2}} + \frac{K_{in}}{({WL})_{in}}} \right\rbrack}\frac{1}{f}}} \right)}},$where

g_(m,in) is a transconductance of the input tube 2022, g_(m,out) is atransconductance of the output current mirror 2023, (WL)_(in) is aproduct of a width and a length of the input tube 2022, (WL)_(out) is aproduct of a width and a length of the output current mirror 2023,K_(in) is a carrier mobility of the input tube 2022, K_(out) is acarrier mobility of the output current mirror 2023, C_(ox) is a unitcapacitance of gate oxide of a MOS device, k is a Boltzmann constant, Tis a Kelvin temperature, and γ is a channel coefficient of the device.

To further improve noise performance of the LDO, a noise filter circuit208 may be further disposed between the reference voltage source 201 andthe error amplifier 202. The noise filter circuit 208 may be coupled tothe reference voltage source 201 and the error amplifier 202, and isconfigured to perform noise filtering on the reference voltage providedby the reference voltage source 201, and send, to the error amplifier202, the reference voltage on which noise filtering is performed.

In addition, in this embodiment of the present invention, an outputvoltage of the low dropout regulator may be directly used as a feedbackvoltage of the error amplifier 202. In order that the output voltage ofthe LDO can be regulated, in another embodiment of the presentinvention, a feedback circuit 207 may be configured to generate afeedback voltage according to the on-load voltage.

As shown in FIG. 5, the feedback circuit 207 may include a first bleederresistor 2071 and a second bleeder resistor 2072. A terminal of thefirst bleeder resistor 2071 is connected to the positive input of theerror amplifier 202, and another terminal of the first bleeder resistor2071 is connected to a battery ground. A terminal of the second bleederresistor 2072 is connected to the positive input of the error amplifier202, and another terminal of the second bleeder resistor 2072 isconnected to the drain of the transistor 203 and the load. Therefore, amagnitude of the feedback voltage can be changed by regulating aresistance value of the first bleeder resistor and a resistance value ofthe second bleeder resistor 2072, so as to change a magnitude of theon-load voltage of the LDO.

It can be learned from the foregoing embodiment that, by adding a secondcompensation circuit, a value of a gain-bandwidth product and a size ofa dominant pole can be significantly reduced, and a size of a secondarydominant pole can be increased. Therefore, by introducing the secondcompensation circuit, system stability is greatly improved, and atransconductance of an error amplifier in the present invention can begreater than a transconductance of a prior-art error amplifier.Therefore, the error amplifier in the present invention has better noiseperformance.

Corresponding to the LDO embodiment in the present invention, anembodiment of the present invention further provides a method forimproving stability of a low dropout regulator.

As shown in FIG. 6, the method for improving stability of a low dropoutregulator includes the following steps.

Step 601: Receive a reference voltage and a feedback voltage.

An LDO noise regulation apparatus first receives the reference voltageand the feedback voltage. The reference voltage is provided by areference voltage source, and the feedback voltage is related to anon-load voltage of the LDO.

Step 602: Compare the feedback voltage with the reference voltage, andgenerate a control voltage according to a result of comparing thefeedback voltage with the reference voltage.

After receiving the feedback voltage and the reference voltage, the LDOnoise regulation apparatus may compare the feedback voltage with thereference voltage, and generate the control voltage according to theresult of comparing the feedback voltage and the reference voltage. Thereference voltage may be a voltage directly output by the referencevoltage source, or may be a voltage obtained after a voltage directlyoutput by the reference voltage source is filtered by a noise filtercircuit. The feedback voltage may be the on-load voltage of the LDO, ormay be a voltage generated by a feedback circuit according to theon-load voltage of the LDO. For a specific manner of generating thereference voltage, reference may be made to the foregoing descriptions,and details are not described herein.

Step 603: Generate a regulating current under control of the controlvoltage.

After the control voltage is generated, the LDO noise regulationapparatus may generate the regulating current according to the controlvoltage. The LDO noise regulation apparatus may generate the regulatingcurrent by using a regulating circuit. The regulating circuit may be apower MOS device such as a transistor. For a specific manner ofgenerating the regulating current, reference may be made to theforegoing descriptions, and details are not described herein.

Step 604: regulate a dominant pole and a secondary dominant pole of thelow dropout regulator according to the regulating current.

After the regulating current is generated, the LDO noise regulationapparatus may regulate the dominant pole and the secondary dominant poleof the low dropout regulator by using a circuit structure or a signalprocessing process that has an effect of zero-pole splitting, forexample, a compensation circuit including a nulling resistor and aMiller compensation capacitor. In this way, a regulated dominant pole isless than the dominant pole before the regulation, and a regulatedsecondary dominant pole is greater than the secondary dominant polebefore the regulation. For a specific implementation manner, referencemay be made to the foregoing embodiments, and details are not describedherein.

Step 605: Further regulate the dominant pole and the secondary dominantpole of the low dropout regulator according to the regulating current onthe basis that the dominant pole and the secondary dominant pole of thelow dropout regulator are regulated according to the regulating current,and regulate a gain-bandwidth product of the low dropout regulatoraccording to the regulating current.

Another compensation circuit may be further used to regulate thedominant pole and the secondary dominant pole of the low dropoutregulator according to the regulating current on the basis that the LDOnoise regulation apparatus regulates the dominant pole and the secondarydominant pole of the low dropout regulator by using the circuitstructure or the signal processing process that has the effect ofzero-pole splitting; and regulate the gain-bandwidth product of the lowdropout regulator according to the regulating current. The dominant poleand the secondary dominant pole of the low dropout regulator may befurther regulated in a resistor compensation manner. For a specificimplementation manner, reference may be made to the foregoingembodiments, and details are not described herein.

It can be learned that, by regulating a dominant pole and a secondarydominant pole of a low dropout regulator in a two-level regulationmanner, a value of a gain-bandwidth product and a size of the dominantpole can be significantly reduced, and a size of the secondary dominantpole can be increased. Therefore, by introducing a second compensationcircuit, system stability is greatly improved, and a transconductance ofan error amplifier in the present invention can be greater than atransconductance of a prior-art error amplifier. Therefore, the erroramplifier in the present invention has better noise performance.

In addition to the LDO in the foregoing embodiments, the embodiments ofthe present invention further provide a phase-locked loop, where an LDOin the phase-locked loop may be the LDO described in the foregoingembodiments.

A person skilled in the art may clearly understand that, thetechnologies in the embodiments of the present invention may beimplemented by software in addition to a necessary general hardwareplatform. Based on such understanding, the technical solutions of thepresent invention essentially or the part contributing to the prior artmay be implemented in a form of a software product. The software productis stored in a storage medium, such as a ROM/RAM, a hard disk, or anoptical disc, and includes several instructions for instructing acomputer device (which may be a personal computer, a server, or anetwork device) to perform the methods described in the embodiments orsome parts of the embodiments of the present invention.

The embodiments in this specification are all described in a progressivemanner, for same or similar parts in the embodiments, reference may bemade to these embodiments, and each embodiment focuses on a differencefrom other embodiments. Especially, a system embodiment is basicallysimilar to a method embodiment, and therefore is described briefly; forrelated parts, reference may be made to partial descriptions in themethod embodiment.

The foregoing descriptions are implementation manners of the presentinvention, but are not intended to limit the protection scope of thepresent invention. Any modification, equivalent replacement, andimprovement made without departing from the spirit and principle of thepresent invention shall fall within the protection scope of the presentinvention.

What is claimed is:
 1. A low dropout regulator, comprising: a referencevoltage source configured to provide a reference voltage; an erroramplifier comprising a first input terminal, a second input terminal,and a first output terminal, wherein the first input terminal is coupledto the reference voltage source and configured to receive the referencevoltage, wherein the second input terminal is configured to receive afeedback voltage, wherein the error amplifier is configured to comparethe feedback voltage with the reference voltage to produce a controlvoltage according to a result of comparing the feedback voltage with thereference voltage, and wherein the first output terminal is configuredto output the control voltage; a first compensation circuit comprising afirst terminal and a second terminal; a second compensation circuitcomprising a third terminal, a fourth terminal, and a resistor, whereinthe third terminal is coupled to the first output terminal, wherein thefourth terminal is coupled to the first terminal, wherein the resistorhas a preset resistance value R_(B), and wherein the second compensationcircuit is configured to regulate at least one pole of the low dropoutregulator; a regulating circuit comprising a third input terminal and asecond output terminal, wherein the third input terminal is coupled tothe fourth terminal and configured to receive the control voltagethrough the second compensation circuit, wherein the regulating circuitis configured to produce a regulating current under control of thecontrol voltage, and wherein the second output terminal is coupled tothe second terminal and configured to output the regulating current; anda load coupled to the second output terminal, wherein an on-load voltageis formed when the regulating current passes through the load, andwherein the feedback voltage is related to the on-load voltage.
 2. Thelow dropout regulator according to claim 1, wherein the regulatingcircuit comprises a transistor.
 3. The low dropout regulator accordingto claim 2, wherein the third input terminal is a gate of the transistorand the second output terminal is a drain of the transistor.
 4. The lowdropout regulator according to claim 1, wherein the first compensationcircuit comprises a first resistor and a capacitor.
 5. The low dropoutregulator according to claim 1, wherein the resistor is a silicondiffusion resistor, a MOS device resistor, or a metal wiring resistor.6. The low dropout regulator according to claim 1, further comprising anoise filter circuit coupled between the reference voltage source andthe first input terminal and configured to perform noise filtering onthe reference voltage.
 7. The low dropout regulator according to claim1, wherein the feedback voltage is the on-load voltage.
 8. The lowdropout regulator according to claim 1, further comprising a feedbackcircuit coupled to the second output terminal and configured to: receivethe on-load voltage; and generate the feedback voltage according to theon-load voltage.
 9. The low dropout regulator according to claim 8,wherein the feedback circuit comprises a third resistor and a fourthresistor, wherein a fifth terminal of the third resistor is coupled tothe second output terminal, wherein a sixth terminal of the thirdresistor is coupled to a seventh terminal of the fourth resistor, andwherein an eighth terminal of the fourth resistor is coupled to ground.10. The low dropout regulator according to claim 1, further comprising afeedback circuit coupled to the second output terminal.
 11. Aphase-locked loop comprising: a low dropout regulator comprising: areference voltage source configured to provide a reference voltage; anerror amplifier comprising a first input terminal, a second inputterminal, and a first output terminal, wherein the first input terminalis coupled to the reference voltage source and configured to receive thereference voltage, wherein the second input terminal is configured toreceive a feedback voltage, wherein the error amplifier is configured tocompare the feedback voltage with the reference voltage to produce acontrol voltage according to a result of comparing the feedback voltagewith the reference voltage, and wherein the first output terminal isconfigured to output the control voltage; a first compensation circuitcomprising a first terminal and a second terminal; a second compensationcircuit comprising a third terminal, a fourth terminal, and a resistor,wherein the third terminal is coupled to the first output terminal,wherein the fourth terminal is coupled to the first terminal, whereinthe resistor has a preset resistance value R_(B), and wherein the secondcompensation circuit is configured to regulate at least one pole of thelow dropout regulator; a regulating circuit comprising a third inputterminal and a second output terminal, wherein the third input terminalis coupled to the fourth terminal and configured to receive the controlvoltage through the second compensation circuit, wherein the regulatingcircuit is configured to produce a regulating current under control ofthe control voltage, and wherein the second output terminal is coupledto the second terminal and configured to output the regulating current;and a load coupled to the second output terminal, wherein an on-loadvoltage is formed when the regulating current passes through the load,and wherein the feedback voltage is related to the on-load voltage. 12.The phase-locked loop according to claim 11, wherein the regulatingcircuit comprises a transistor.
 13. The phase-locked loop according toclaim 12, wherein the third input terminal is a gate of the transistorand the second output terminal is a drain of the transistor.
 14. Thephase-locked loop according to claim 11, wherein the first compensationcircuit comprises a first resistor and a capacitor.
 15. The phase-lockedloop according to claim 11, wherein the resistor is a silicon diffusionresistor, a MOS device resistor, or a metal wiring resistor.
 16. Thephase-locked loop according to claim 11, wherein the low dropoutregulator further comprises a noise filter circuit coupled between thereference voltage source and the first input terminal and configured toperform noise filtering on the reference voltage.
 17. The phase-lockedloop according to claim 11, wherein the feedback voltage is the on-loadvoltage.
 18. The phase-locked loop according to claim 11, wherein thelow dropout regulator further comprises a feedback circuit coupled tothe second output terminal and configured to: receive the on-loadvoltage; and generate the feedback voltage according to the on-loadvoltage.
 19. The phase-locked loop according to claim 18, wherein thefeedback circuit comprises a third resistor and a fourth resistor,wherein a fifth terminal of the third resistor is coupled to the secondoutput terminal, wherein a sixth terminal of the third resistor iscoupled to a seventh terminal of the fourth resistor, and wherein aneighth terminal of the fourth resistor is coupled to ground.
 20. Thephase-locked loop according to claim 11, wherein the low dropoutregulator further comprises a noise filter circuit coupled between thereference voltage source and the first input terminal.